Wafer-level Packaging Devices to Outperform Flip Chip Tech Shipments

The flip chip (FC) packaging sector is projected to reach a little over US$ 31 billion by 2022, but demand for wafer level packaging (WLP) is soaring even higher. WLP has reached a compound growth rate of 15% a year, having overtaken FC shipments in early 2017.  The flourishing consumer device sector is responsible for the boom, requiring low cost packaging that’s smaller, faster, and lighter. WLP’s comparatively low price is equally hard to resist.

WLP allows:

  • Integration with resistors, transistors, and other components.
  • Multichip capability.
  • Reduced form factor.
  • Complex 3D structures.
  • More I/O density.
  • Better economy.

Global leaders continue to advance FC and WLP technology but next generation dielectric films are already emerging. FC packaging is also receiving focused attention. Its wire bonding used to cause sluggishness, and its electromagnetic emissions were too high. Both these problems have been solved by adding direct connection to substrates. Fluxing has been constrained to improve rust resistance and solder spreading. If the soldered bump can be bonded and adjusted flawlessly, many of FC’s challenges can be removed, but WLP overcomes most of these issues single-handedly at a lower price.

R&D Drives Demand

Focused research and development has caused much of the demand surge, which has led to distinct segmenting based on bumping technology, geography, packaging, and integration. Fan-out WLP is expected to enjoy the highest growth thanks to its ultra-high density interconnections and ability to integrate with several heterogeneous dies. It doesn’t play well with a wide range of applications, though.

FC technology was introduced three decades ago, so innovative adaptations are needed to maintain its relevance. All the R&D it needs is being applied to more interesting technologies, with WLP being the most practical.

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