With Moore’s Law, semiconductor manufacturing company chipmakers have long been able to double the transistor count at each node while simultaneously reducing costs by almost 30 percent. This nano technology development has been so successful due to the use of IC scaling, which creates faster chips for devices, such as electronics, at a lower cost. While Moore’s Law has continuously provided both producers and consumers with benefits over the years, the industry is not sure how long the law will continue to be applicable.
Today, nano technology development is at a stage where chips are expected to scale down to 10nm. While this is a very advanced technology, the semiconductor manufacturing industry is already looking ahead at nano technology development of the near future. Chipmakers have been making progress in evaluating and defining transistor options for 7nm, and expect to release the technology by 2018. From here, chipmakers predict that they will be able to scale the size down another step to 5 nm, followed by 3nm within the next ten or so years.
While chipmakers believe that they will continue to make progress in nano technology development, the path Moore’s Law has created in the past years is no longer as clear as it once was. Industry experts are in opposition as to which transistor technology will maintain the traditional cost-per-transistor curve once 7 nm is released. There are already issues with this curve as the industry has experienced slowing at 20nm as well as 14 nm, meaning that Moore’s Law may no longer hold true.
In order to bring technologies back in line with the cost-per-transistor curve, the semiconductor industry is considering a number of options for 7nm and beyond, including the following:
- III-V FinFETs
- Gate-All-Around FinFETs
- Nanowire FinFETs
- SOI FinFETs
- Tunnel FinFETs
- 2.5D/3D Stacked Die
- Monolithic 3D
- Carbon Nanotubes
The FinFETs and FDSOI technologies that are used by the semiconductor industry today are expected to work well for 10nm, but will begin to lose their effectiveness by the time 7nm is released. For this reason, the transistor technologies listed above must be considered.
The technologies that are eventually chosen will be based solely on three factors: cost, manufacturability and functionality. The leading contender for the job currently is III-V FinFETs, which involves injecting the channels with III-V material in order to increase mobility. Another very popular option is gate-all-around FinFETs, which have two or more gates, each wrapped by III-V nanowire channels. As the years pass, and the industry furthers nano technology development to 7nm and beyond, we will start to see a clearer picture in regards to transistor technology.
At Shin-Etsu MicroSi, a world renowned semiconductor manufacturing company, we actively educate and involve ourselves in the nano technology development process. We do so to ensure that we are offering only the highest quality, technologically advanced products on the market for your operations. To learn more about our products, including packaging,lithography, photomasks and more, call Shin-Etsu MicroSi at (480) 893-8898 or contact us online.